Minimizing Inter-Clock Coupling Jitter
نویسندگان
چکیده
Crosstalk noise is a crucial factor affecting chip performance in deep submicron technologies. Among all possible crosstalk noise sources, clock is the most common aggressor as well as victim. Crosstalk on clock nets can increase clock jitter, which may degrade significantly the system performance. Besides, in modern chip designs, there is usually more than one clock net, and sometimes even tens of them. It is therefore imperative to design clock topologies to prevent possible crosstalk among them. In this paper, we address the inter-clock crosstalk. We propose algorithms to design clock topology and to perform routing minimizing the effective crosstalk. Our experimental results show a significant reduction of clock jitter compared to the conventional clock tree synthesis which does not take into account the inter-clock crosstalk effects.
منابع مشابه
Minimizing coupling jitter by buffer resizing for coupled clock networks
Crosstalk noise is a crucial factor affecting chip performance in deep submicron technologies. Among all possible crosstalk noise sources, clock is the most common aggressor as well as victim..Crosstalk on clock nets can increase clock jitter, which may degrade significantly the system performance. It is therefore imperative to design clock buffers to reduce the coupling effects. In this paper,...
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